IBM and Oracle shared more details this week about new RISC chips they’re building for server customers, the Power7+ in the case of IBM and the T5 for Oracle.
The Unix server market continues to contract as x86-based systems gain more capabilities, but the Unix category still generated US$2.3 billion in revenue last quarter, or about one-fifth of the overall server market, according to IDC. And if there’s money to be made, vendors will keep investing, at least for the time being.
IBM’s new, eight-core Power7+, expected before the end of the year, is being manufactured on a 32-nanometer process, compared with 45 nanometers for the Power7. The more advanced process enables smaller transistors, which means IBM could fit several new features on the chip while keeping it about the same size.
IBM used some of the extra space to expand the Level 3 cache memory to 80MB, from 32MB on the Power7. “This memory increase will lead to a major performance growth path for scale-up enterprise workloads,” IBM’s Scott Taylor said in a presentation at Hot Chips.
He also highlighted IBM’s use of a memory type called embedded DRAM, which uses fewer transistors per bit compared with SRAM. The Power7+ has 2.1 billion transistors altogether, and it would have had 5.4 billion if IBM had used SRAM, Taylor said.
In that sense, eDRAM gives IBM the equivalent of a more advanced manufacturing process, so effectively it can put more functions on the chip that would otherwise require it to move to a new process, Taylor said.
The additional functions include accelerator units for speeding up data encryption and other security tasks. And the chip gets what IBM calls a “true” random number generator. Random numbers are required for security operations, and IBM says its new number generator can stymie any hackers who try to predict what the next number will be.
The Power7+ also includes a “dual chip module” that allows customers to put two processors in one socket. That could reduce per-socket software licensing costs, at least until software vendors take note and change their pricing models. The Power7+ is still socket compatible with the Power7, IBM says.
While IBM and Oracle both optimize their chips for their own servers, Oracle is more explicit that it optimizes its processors for its software as well. Oracle says customers will get the best performance if they’re willing to sign a whole system over to Oracle and run its database and applications on Oracle hardware.
Its upcoming T5 processor is a 28-nanometer shrink of the T4 shown at last year’s Hot Chips. When Oracle went from the T3 to the T4, it halved the core count from 16 to eight in order to focus instead on improving each core’s single-thread performance. The T5 will be back to 16 cores, each running at up to 3.6GHz, compared with 3GHz on the T4.
One of Oracle’s goals for the T5 was to put the chips in as many as eight sockets per server with “close to linear scaling,” Oracle’s Sebastian Turullols said at Hot Chips.
“There are eight-socket systems you can buy that deliver the equivalent of perhaps only five single sockets,” he said. That’s partly because it’s “a hard problem to solve,” he said, and also because some chip vendors optimize their designs to be used in four-socket systems. Oracle says customers who use the T5 in an eight-socket system will get close to the performance of eight processors.
The T5 also adds several features to accelerate clustering, which is important for the big machines Oracle has chosen to focus on, such as its Sparc SuperCluster. And the T5 includes accelerator units for an “unprecedented” 16 encryption algorithms, Turullols said, as well as a random number generator.
Oracle hasn’t said when the T5 will ship, though it’s not expected before the end of the year.
James Niccolai covers data centers and general technology news for IDG News Service. Follow James on Twitter at @jniccolai. James’s e-mail address is james_niccolai@idg.com